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United States Patent 6,429,401
Corral August 6, 2002

Apparatus for verification of assembled printed circuit boards

Abstract

An overlay device for verifying the correct placement of assembled components on a printed circuit board. The overlay device has cutouts to assist users to more precisely verify the correct placement of components with or without leads. Some overlay embodiments have writing, printing, engraving, and etching to assist a user in identifying which product the overlay is to be used with, what point in the assembly the overlay is to be used, and the correct orientation and spacing for the components.


Inventors: Corral; Abimael (Austin, TX)
Assignee: Cad-Tech, Inc. (Austin, TX)
Appl. No.: 970454
Filed: October 3, 2001

Current U.S. Class: 219/121.6; 219/121.67; 219/121.68; 219/121.7; 428/131
Intern'l Class: B23K 026/00
Field of Search: 428/131 219/121.6,121.67,121.68,212.7


References Cited

U.S. Patent Documents
4760265Jul., 1988Yoshida et al.250/492.
5617990Apr., 1997Thompson, Sr.228/180.
5958628Sep., 1999Balz et al.430/5.

Primary Examiner: Elve; M. Alexandra
Attorney, Agent or Firm: Calico; H. Lisa Thompson & Knight LLP

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